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ZBasic Language Reference 120 ZX Microcontroller Family PORTF_INT0¹, PORTF_INT1¹ PORTH_INT0¹, PORTH_INT1¹ PORTJ_INT0¹, PORTJ_INT1¹ PORTK_INT0¹, PORTK_INT1¹ PORTQ_INT0¹, PORTQ_INT1¹ PORTR_INT0, PORTR_INT1 PORTR_INT0, PORTR_INT1 RTC_COMP, RTC_OVF RTC_COMP, RTC_OVF SPIC_INT, SPID_INT SPIC_INT, SPID_INT SPIE_INT, SPIF_INT TCC0_CCA 5 , TCC0_CCB 6 , TCC0_CCC, TCC0_CCD TCC0_CCA 5 , TCC0_CCB 6 , TCC0_CCC, TCC0_CCD TCC0_ERR, TCC0_OVF 5 TCC0_ERR, TCC0_OVF 5 TCC1_CCA² TCC1_CCA² TCC1_CCB 4 , TCC1_ERR, TCC1_OVF TCC1_CCB 4 , TCC1_ERR, TCC1_OVF TCD0_CCA 5 , TCD0_CCB 6 , TCD0_CCC, TCD0_CCD TCD0_CCA 5 , TCD0_CCB 6 , TCD0_CCC, TCD0_CCD TCD0_ERR, TCD0_OVF 5 TCD0_ERR, TCD0_OVF 5 TCD1_CCA³, TCD1_CCB 6 , TCD1_ERR, TCD1_OVF 5 TCD1_CCA³, TCD1_CCB 6 , TCD1_ERR, TCD1_OVF 5 TCE0_CCA 5 , TCE0_CCB 6 , TCE0_CCC, TCE0_CCD TCE0_CCA 5 , TCE0_CCB 6 , TCE0_CCC, TCE0_CCD TCE0_ERR, TCE0_OVF 5 TCE0_ERR, TCE0_OVF 5 TCE1_CCA 5 , TCE1_CCB 6 , TCE1_ERR, TCE1_OVF 5 TCE1_CCA 5 , TCE1_CCB 6 , TCE1_ERR, TCE1_OVF 5 TCF0_CCA 5 , TCF0_CCB 6 , TCF0_CCC, TCF0_CCD TCF0_ERR, TCF0_OVF 5 TCF1_CCA 5 , TCF1_CCB 6 , TCF1_ERR, TCF1_OVF 5 TWIC_TWIM, TWIC_TWIS TWIC_TWIM, TWIC_TWIS TWID_TWIM, TWID_TWIS TWIE_TWIM, TWIE_TWIS TWIE_TWIM, TWIE_TWIS TWIF_TWIM, TWIF_TWIS USARTC0_DRE, USARTC0_RXC, USARTC0_TXC USARTC0_DRE, USARTC0_RXC, USARTC0_TXC USARTC1_DRE, USARTC1_RXC, USARTC1_TXC USARTC1_DRE, USARTC1_RXC, USARTC1_TXC USARTD0_DRE 7 , USARTD0_RXC 7 , USARTD0_TXC 7 USARTD0_DRE 7 , USARTD0_RXC 7 , USARTD0_TXC 7 USARTD1_DRE 8 , USARTD1_RXC 8 , USARTD1_TXC 8 USARTD1_DRE 8 , USARTD1_RXC 8 , USARTD1_TXC 8 USARTE0_DRE 8 , USARTE0_RXC 8 , USARTE0_TXC 8 USARTE0_DRE 8 , USARTE0_RXC 8 , USARTE0_TXC 8 USARTE1_DRE 8 , USARTE1_RXC 8 , USARTE1_TXC 8 USARTF0_DRE 8 , USARTF0_RXC 8 , USARTF0_TXC 8 USARTF1_DRE 8 , USARTF1_RXC 8 , USARTF1_TXC 8 1 Used by WaitForInterrupt(). 2 Used by the RTC, cannot be replaced. 3 Used by OpenCom() for channels 3-6 (software UART). 4 Used by OpenX10(). 5 Used by InputCapture(). 6 Used by OutputCapture(). 7 Used by Com1, cannot be replaced. 8 Used by OpenCom() for channels 2 and 7-12 (where supported). For the form of ISR definition shown in the example above, the compiler takes care of saving the necessary registers upon entry, establishing the standard register state, restoring registers upon exit and executing a “return from interrupt” instruction. For special cases, you may define a “naked” ISR – one in which none of this is done. Using this special form is advised only for advanced programmers, particularly those that understand the nuances of the underlying code. An example of a naked ISR containing only a “return from interrupt” is shown below. This is commonly called a “stub” ISR. It is important to note that defining a naked ISR with no code statements in it at all results in undefined behavior. At a minimum, you should always include an assembly language “reti” as shown in the example below.