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ZBasic System Library 210 ZX Microcontroller Family PWM8 Type Subroutine Invocation PWM8(channel, dutyCycle) PWM8(channel, dutyCycle, status) Parameter Method Type Description channel ByVal Byte The channel to use for 8-bit PWM generation. dutyCycle ByVal Single or integral The desired duty cycle. status ByRef Boolean The variable to receive the status value. Discussion This subroutine begins or modifies the generation of an 8-bit PWM signal on the specified channel. The channel must have been previously prepared for PWM generation by calling OpenPWM8(). Eight-bit PWM generation is performed using one of the CPU’s 8-bit timers, the number of which varies depending on the ZX model. The table below indicates the output pin for each PWM supported channel. Output Pins for 8-bit PWM Channel Numbers ZX Models Timer 1 2 ZX-24 2 25, D.7 - ZX-40 2 21, D.7 - ZX-44 2 16, D.7 - ZX-24a, ZX-24p, ZX-24n 2 25, D.7 12, D.6 ZX-40a, ZX-40p, ZX-40n 2 21, D.7 20, D.6 ZX-44a, ZX-44p, ZX-44n 2 16, D.7 15, D.6 ZX-328n, ZX-328l 2 17, B.3 5, D.3 ZX-32n, ZX-32l 2 15, B.3 1, D.3 ZX-1281, ZX-1281n 0 17, B.7 1, G.5 ZX-1280, ZX-1280n 0 26, B.7 1, G.5 ZX-24e 2 13, D.7 - ZX-24ae, ZX-24pe, ZX-24ne 2 13, D.7 14, D.6 ZX-128e, ZX-128ne 2 17, B.7 - ZX-1281e, ZX-1281ne 0 21, B.7 G.5 ZX-328nu 2 14, B.3 6, D.3 The dutyCycle parameter specifies the desired duty cycle of the generated signal, expressing the percentage of time that the PWM signal will be at the logic 1 state. If the supplied parameter is of type Single, the value is in percent with a resolution of 0.01%. If the supplied parameter is integral, the units are percent, i.e., the value 100 means 100%. Specifying a Single value that is negative or any value greater than 100 will have an undefined effect. The status parameter, if supplied, receives a value to indicate success or failure of the call. If this subroutine is called without a preceding call to OpenPWM8() to prepare the timer, the call will have no effect. This subroutine may be called multiple times to effect changes to the PWM signal’s duty cycle while the signal is being generated. The change in duty cycle is synchronized so that it takes effect at the beginning of the next PWM pulse.