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ZBasic System Library
168
ZX Microcontroller Family
OpenSPI
Type
Subroutine
Invocation
OpenSPI(channel, flags, csPin)
OpenSPI(channel, flags, csPin, rxDelay)
Parameter
Method
Type
Description
channel
ByVal
Byte
The SPI channel to open (1-4).
flags
ByVal
Byte
Flags controlling the SPI communication.
csPin
ByVal
Byte
The pin for the chip select signal to the device.
rxDelay
ByVal
Byte
The delay time prior to each received byte.
Discussion
This subroutine prepares an SPI channel for use as a master. Four channels are supported, numbered 1
through 4. It does not matter if the particular channel has been previously opened. The flags
parameter specifies the characteristics of the SPI communication as shown in the table below. They must
be set to be compatible with the device with which you want to communicate. See the table below for
details. The csPin parameter specifies the pin number that you wish to control the device’s chip select
input. The pin will be made an output and set to the inactive state (as specified by bit 6 of the flags
parameter).
SPI Channel Control Bits
Function
Hex Value
Binary Value
Bit Rate f/4
&H00
xx xx xx 00
Bit Rate f/16
&H01
xx xx xx 01
Bit Rate f/64
&H02
xx xx xx 10
Bit Rate f/128
&H03
xx xx xx 11
Clock Phase False
&H00
xx xx x0 xx
Clock Phase True
&H04
xx xx x1 xx
Clock Low at Idle
&H00
xx xx 0x xx
Clock High at Idle
&H08
xx xx 1x xx
Bit Order – MSB first
&H00
xx 0x xx xx
Bit Order – LSB first
&H20
xx 1x xx xx
Active Low Chip Select
&H00
x0 xx xx xx
Active High Chip Select
&H40
x1 xx xx xx
Double Speed
&H80
1x xx xx xx
The remaining bits are currently undefined but they may be employed in the future. Because of this
possibility, the undefined flag bits should be zero. Bits 3 and 2 taken together specify the SPI mode 0-3,
e.g. xx xx 00 xx specifies mode 0. Note that if the Double Speed bit is set, the SPI channel will run at
twice the frequency specified by the two low order flag bits. The value of f for the bit rate selector is the
CPU frequency (typically 14.7456MHz).
The rxDelay parameter, which defaults to zero if not present, specifies the amount of time to delay
before beginning the SPI cycle for each byte received, if any, during the second half of the SPICmd()
process. See the description of SPICmd() for more details.
Caution
For ZX devices that use an external SPI EEPROM for user program storage, you must avoid doing
anything that will interfere with the SPI commands to that device. SPI communication by direct
manipulation of the processor SPI control registers is not supported and may cause your program to
malfunction.
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