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ZBasic System Library 173 ZX Microcontroller Family processor’s TWBR register. The low two bits of the high byte select a clock divisor according to the table below. The clock speed of the hardware channel is given by the formula F_CPU / (16 + 2 * BR * Divisor) where F_CPU is the device’s operating frequency . If the bitRate parameter is omitted or is zero the value of 66 is used by default. Channel 0 Prescaler Selector Value Value Divisor 0 1 1 4 2 16 3 64 For ATxmega-based devices, the I2C bit rate is given by the formula F_CPU / 2 / (5 + rateVal) where rateVal is the low 8 bits of the bitRate parameter. Rearranging this formula gives an equation for the bitRate parameter: bitRate = (F_CPU / 2 / F_I2C) – 5 where F_I2C is the desired I2C clock frequency. For channels 1-4 the bitRate parameter is interpreted as the number of I/O Timer ticks per bit. For I2C operations, the I/O Timer uses the prescaler specified by Register.TimerSpeed1. With the default prescaler of 1, each I/O Timer tick represents approximately 68nS. If the bitRate parameter is omitted or is zero the value of 74 is used by default. Due to processing overhead, the minimum attainable bit time is approximately 4µS. For channel 0, the table below gives the pin numbers used for SDA and SCL. Channel 0 SCL and SDA Pins ZX Models SCL SDA ZX-24, ZX-24a, ZX-24p, ZX-24n, ZX-24r, ZX-24s 12, C.0 11, C.1 ZX-40, ZX-40a, ZX-40p, ZX-40n, ZX-40r, ZX-40s 22, C.0 23, C.1 ZX-44, ZX-44a, ZX-44p, ZX-44n, ZX-44r, ZX-44s 19, C.0 20, C.1 ZX-24e, ZX-24ae, ZX-24ne, ZX-24pe, ZX-24nu, ZX-24pu, ZX-24ru, ZX-24su 12, C.0 11, C.1 ZX-328n, ZX-328l, ZX-32n, ZX-32l 28, C.5 27, C.4 ZX-1281, ZX-1281n 25, D.0 26, D.1 ZX-1280, ZX-1280n 43, D.0 44, D.1 ZX-24x, ZX-24xu 11, C.1 12, C.0 ZX-32a4 11, C.1 10, C.0 ZX-128a1 16, C.1 15, C.0 ZX-128e, ZX-128ne, ZX-1281e, ZX-1281ne 12, D.0 11, D.1 ZX-328nu 22, C.5 21, C.4 The table below specifies the pins used for SDA and SCL when the available additional hardware I2C controllers are used. SCL and SDA Pins for Additional Hardware Channels ZX Models Chan 1 SCL Chan 1 SDA Chan 2 SCL Chan 2 SDA Chan 3 SCL Chan 3 SDA ZX-24x 17, E.1 25, E.0 - - - - ZX-24xu 23, E.1 24, E.0 - - - - ZX-32a4 29, E.1 28, E.0 - - - - ZX-128a1 36, E.1 35, E.0 26, D.1 25, D.0 46, F.1 45, F.0 Examples Call OpenI2C(0, 0, 0) ' open the hardware channel at 100KHz Call OpenI2C(2, 19, 20) ' open channel 2 using pins 19, 20 Call OpenI2C(1, C.3, A.1, 74) ' open channel 1 at 200KHz