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ZBasic System Library 187 ZX Microcontroller Family OpenX10 Type Subroutine Invocation OpenX10(channel, inQueue, outQueue) Parameter Method Type Description channel ByVal Byte The X-10 communication channel to open. inQueue ByRef array of Byte The queue for incoming X-10 data. outQueue ByRef array of Byte The queue for outgoing X-10 data. Discussion This subroutine prepares an X-10 communication channel for use. After the channel is opened you can send arbitrary X-10 command bit streams, which you must create in low-level form, by simply adding the constitutent bytes to the outgoing queue. Similarly, the incoming queue will receive raw X-10 data which you must decode. Each X-10 command begins with the bit sequence 1110 which is followed by additional bit pairs. The bit pair 01 represents a logic zero while the bit pair 10 represents a logic one. The bit pair 11 is invalid and the bit pair 00 signifies the end of a command bit stream and also represents the idle condition. Additional information on X-10 commands may be found in various places on the Internet. If the specified channel is already open or if the channel number is invalid, it has no effect. The supported channel numbers are 1-2. The channel must have been previously configured by a call to DefineX10(). Also, the queues specified for the receive and transmit channels each must have been previously initialized by calling OpenQueue(). If you set up a transmit-only or receive-only serial channel you may use the value 0 for the unused queue. If you provide the value 0 for both queues, the channel will not be opened. Example Dim outQueue(1 to 40) as Byte Call OpenQueue(outQueue, SizeOf(outQueue)) Call DefineX10(1, 0, 12, &H08) Call OpenX10(1, 0, outQueue) The code above prepares channel 1 as for transmit-only operation. If you wanted reception as well, you would have to declare and initialize a second queue and define the receive pin. Resource Usage X-10 communication requires the use of a zero-crossing signal input to the ZX as noted in the table below. When one or more of the X-10 channels are open the zero-crossing input pin may not be used for any other purpose. When all X-10 channels are closed, zero-crossing input pin will again be available for other uses. For native mode devices, the ISRs noted in the table below are automatically included. Resources Required Underlying CPU Zero Crossing Input ISR Name mega328P, mega644P, mega1284P INT0 Timer0_CompB, INT0 mega1281, mega1280 INT0 Timer2_CompB, INT0 xmega128A1, xmega32A4 A.5 TCC1_CCB, ACA_AC0