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ZBasic System Library
184
ZX Microcontroller Family
OpenSPISlave
Type
Subroutine
Invocation
OpenSPISlave(flags)
Parameter
Method
Type
Description
flags
ByVal
integral
Flags controlling the SPI communication.
Discussion
This subroutine, available only for native mode devices, immediately activates the hardware SPI
controller in slave mode. The flags parameter specifies the characteristics of the SPI communication.
They must be set to be compatible with the SPI master with which you want to communicate. See the
table below for details.
SPI Slave Mode Configuration Bits
Function
Hex Value
Bit Mask
Clock Phase False
&H00
xx xx x0 xx
Clock Phase True
&H04
xx xx x1 xx
Clock Low at Idle
&H00
xx xx 0x xx
Clock High at Idle
&H08
xx xx 1x xx
Bit Order – MSB first
&H00
xx 0x xx xx
Bit Order – LSB first
&H20
xx 1x xx xx
For devices that have multiple SPI controllers (e.g. xmega-based devices), the most significant byte of the
flags parameter specifies the index of the SPI controller to use (0=PortD, 1=PortC, 2=PortE, 3=PortF).
See the tables below for information about which pins of each port are used for the SPI control/data pins.
The chip select pin for an SPI slave is a dedicated pin; see the table below. If you activate slave mode,
you must also provide an interrupt handler for the corresponding interrupt vector. While slave mode is
active, SPICmd() calls are ineffective for that channel. Slave mode can be canceled by calling
CloseSPI().
Slave Mode CS Pin by Controller Index
ZX Models
0
1
2
3
ZX-40n, ZX-40s
5, B.4
ZX-44n, ZX-44s
44, B.4
ZX-24ne
24, B.4
ZX-328n, ZX-328l
16, B.2
ZX-32n, ZX-32l
14, B.2
ZX-1281n
10, B.0
ZX-1280n
19, B.0
ZX-24x
D.4
8, C.4
ZX-32a4
24, D.4
14, C.4
ZX-128a1
29, D.4
19, C.4
39, E.4
49, F.4
ZX-128ne, ZX-1281ne
28, B.0
ZX-328nu
13, B.2
ZX-24xu
16, D.4
8, C.4
See OpenSPI() for information about which pins are used for the data and control signals for each SPI
controller.
Note that the SPI master sets the SPI clock speed. The highest SPI clock speed that can be used
reliably is one quarter of the CPU clock speed of a ZX slave device. Depending on how much
computation the slave must perform to prepare data for sending back to the master, a substantially slower
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