Page 281 of 346 Start Back Next End ZBasic System Library 269 ZBasic Microcontrollers ShiftInEx Type Function returning UnsignedInteger Invocation ShiftInEx(dataPin, clkPin, bitCnt, flags) ShiftInEx(dataPin, clkPin, bitCnt, flags, bitTime) Parameter Method Type Description dataPin ByVal Byte The pin used to input data. clkPin ByVal Byte The pin used to output a clocking signal. bitCnt ByVal Byte The number of bits to read in (1 to 16). flags ByVal Byte Flag bits controlling the operation. bitTime ByVal int16 The optional duration of each bit in ticks (see description). Discussion This function can be used to input data from a synchronous serial device like a shift register. The pin specified for input will be made an input but the pin specified for the clock signal must already be an output and be at the desired initial logic level. The flags parameter controls how the shifting process is performed as described in the table below. Control Flag Definitions Function Hex Value Bit Mask MSB first &H00 xx xx xx x0 LSB first &H01 xx xx xx x1 Sample the input after the active clock edge &H00 xx xx xx 0x Sample the input before the active clock edge &H02 xx xx xx 1x Fastest possible bit time &H00 xx xx x0 xx Use the provided bitTime parameter &H04 xx xx x1 xx The active clock edge is the leading clock edge &H00 xx xx 0x xx The active clock edge is the trailing clock edge &H08 xx xx 1x xx The remaining bits are currently undefined but may be employed in the future. For each of the number of bits specified, either the state of the data pin will be read and saved first or the clock line will be changed to the opposite state first depending on bit 1 of the flags parameter. Finally, the clock line will be returned to the original state thus completing one bit cycle. If the flags parameter so specifies, the bitTime parameter value will be used to control the bit rate of the shifting process. The units of the bitTime parameter are, by default, 1 CPU cycle (67.8ns at 14.7MHz). However, Register.TimerSpeed1 may be changed to adjust the controlling clock speed. If the bitTime parameter is not provided or if the value given is zero, the shifting will occur at the maximum rate. Due to processing overhead the minimum bit time in the controlled speed mode is approximately 60 CPU cycles (4µS at 14.7MHz). Attempting faster bit times in the controlled speed mode will produce undefined results. Without speed control, the bit time is approximately 37 CPU cycles (2.5µS at 14.7MHz). Note that the duty cycle of the clock signal will be closer to 50% in the controlled speed mode. Without speed control, the active clock phase can be as little as 20% of the period. The returned value consists of the data bits read arranged in MSB or LSB order as specified by the flags parameter. If MSB order is specified, the first bit read will be in the most significant bit position of the result. If LSB order is specified, the first bit read will be in the least significant bit position. If fewer than 16 bits are read, the remaining bits will be zero.