ZBasic System Library
21
ZBasic Microcontrollers
TimerF0
TimerF1
45, F.0
49, F.4
The tables below give the set of pins and corresponding timers that can be used by the OutputCaptureEx
subroutine and also indicate (with an asterisk) the default pin used by the OutputCapture subroutine.
When an output capture operation has been started successfully, the corresponding timer busy flag (e.g.
Register.Timer1Busy) will be set True for the duration of the output capture operation. Note that an
output capture cannot be used at the same time as an input capture operation involving the same timer.
When performing an output capture on a general I/O pin (i.e. a pin not listed in the tables below), any
available 16-bit timer will be used to generate the required timing. If no 16-bit timer is available at the
time, the routine will return immediately.
For native code ZX devices and all generic target devices, at least one ISR will be provided by the
compiler automatically to facilitate the output capture operation corresponding to the timer compare
interrupt. The names of the interrupt vectors are related to the timer and the compare register being
used. For example, for an ATtiny or ATmega device using Timer1 the ISR name would be
Timer1_COMPB while for an xmega device for TimerC0 the ISR name would be TIMERC0_CCB. Note
that if the compiler cannot determine at compile time which timer and compare register will be used, or if
output capture on a general I/O pin is specified, the “compare B” ISRs for all possible timers will be
included in the application.
Hardware Output Capture Pins for ZX Devices
ZX Device
Timer
Output
Pin
Timer
Output
Pin
ZX-24, ZX-24a, ZX-24p, ZX-24n
Timer1
27, D.4*
ZX-40, ZX-40a, ZX-40p, ZX-40n
Timer1
18, D.4*
ZX-44, ZX-44a, ZX-44p, ZX-44n
Timer1
13, D.4*
ZX-24r, ZX-24s
Timer1
27, D.4*
Timer3
B.7
ZX-40r, ZX-40s, ZX-40t
Timer1
18, D.4*
Timer3
8, B.7
ZX-44r, ZX-44s, ZX-44t
Timer1
13, D.4*
Timer3
3, B.7
ZX-328n, ZX-328l
Timer1
16, B.2*
ZX-32n, ZX-32l
Timer1
14, B.2*
ZX-1281, ZX-1281n
Timer1
Timer3
16, B.6*
6, E.4
Timer1
17, B.7¹
ZX-1280, ZX-1280n
Timer1
Timer3
Timer5
25, B.6*
6, E.4
39, L.4
Timer1
Timer4
26, B.7¹
16, H.4
ZX-24x
TimerC0
TimerE0
11, C.1
17, E.1
TimerD0
27, D.1*
ZX-32a4
TimerC0
TimerE0
11, C.1
29, E.1
TimerD0
21, D.1*
ZX-128a1
TimerC0
TimerE0
TimerF0
16, C.1
36, E.1
46, F.1
TimerD0
TimerE1
TimerF1
26, D.1*
40, E.5
50, F.5
ZX-24e, ZX-24ae, ZX-24ne, ZX-24pe, ZX-24nu, ZX-24pu
Timer1
13, D.4*
ZX-24ru, ZX-24su
Timer1
16, D.4*
Timer3
21, B.7
ZX-128e, ZX-128ne, ZX-1281e, ZX-1281ne
Timer1
Timer3
22, B.6*
16, E.4
Timer1
21, B.7¹
ZX-328nu
Timer1
13, B.2*
ZX-24xu
TimerC0
TimerE0
11, C.1
23, E.1
TimerD0
13, D.1*
*
Denotes the default OutputCapture pin.
1
Requires the TIMER1_COMPC ISR and supports OutputCapture modulation.
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