Inexpensive Logic Analyzer

[mikep]

Last year I investigated buying a logic analyzer. I looked at Agilent analyzers on eBay and also USB-based solutions. In the end I decided on an inexpensive yet powerful one based on a FPGA development board. This was also an opportunity for me to learn more about FPGAs and their capabilities.

The logic analyzer is easy to use and I wrote a User Guide. It supports up to 32 input channels with a sample depth of 256K, up to 200 MHz, complex triggering and I2C/SPI protocol analysis. The logic analyzer does however need a 32 channel logic converter and buffer for use with 5V systems. Instead of just building one, I decided to make an interface card available for sale on my website.

So if you have been thinking about getting a logic analyzer, this is an inexpensive ($140) alternative and you still get a FPGA development board to play with.

[spamiam]

I just got this analyzer, and I will be "configuring" the FPGA to do the work this weekend. It seems to be a really interesting application of an FPGA.

I have looked a little at how to configure (i.e. "program") an FPGA. I really have to shift gears mentally from the logic of programming a CPU.
I am still trying to get any sort of grip on the subject, but I am trying to imagine the FPGA as a massively parallel, extremely RISC, processor. Then I combine that a little with "object orientation" and I am beginning to get a vague idea of how to approach an FPGA. The "objects" are groups of the individual gates that are used to perform a single more complex task.

In the tutorial I have read, they say that you can look at the gates as being infinitely fast. IOW, the output occurs simultaneously with the input. And the tutorial so far has not dealt with clocking. But when an object ("entity") is made from a sequence of gates, there must be a propagation delay, so it does become necessary to use a clock at some point. But I have not gotten that far.

Anyway, the code for the logic analyzer is already written so all you need to do is load it into the FPGA board. Mike's instructions tell how to do this very clearly. As I learn more about what an FPGA will do, the more intrigued I become. I just don't know if I can overcome my decades of CPU programing instincts!

-Tony

[victorf]

Mike,

Is this system something that a mere mortal could use or would I need to have an in-depth knowledge of FPGA stuff. I have been using my old TEX 453 for many years but need to move on. I would like a logic analyzer but don't want to get out in front of my electronics knowledge. I guess I would want something that is somewhat plug-and-play. I don't mind a learning curve. I am more of a software type than an electronics wizard I'm afraid.

Any enlightenment will be appreciated.

Vic

[spamiam]

It is definitely plug-and-play. The manual that Mike wrote is quite explicit about how to do the initial programing of the FPGA board. Once programmed, it does not need to be messed-with any longer. After that you just hook up the board via the RS-232 connector (on the board). The PC-side Java program handles the rest.

I am afraid that my reply above made it look as if you needed to know how to write "programs" for the FPGA, but you don't. The program is ready to go. All you do is hook upthe wires to the OMLA-32 add-on board that Mike created and you are ready to go.

-Tony

[mikep]

[spamiam]

[mikep]

[victorf]

I am still considering a logic analyzer. I came across this one:

http://www.saleae.com/logic/

Would someone like to comment on it?

Any enlightenment will be appreciated.

Vic

[spamiam]

[quote="victorf"]I am still considering a logic analyzer. I came across this one:

http://www.saleae.com/logic/
/quote]

It looks very nice. It is USB rate limited. 24MHZ is the maximum sample rate, and half that seems as if it might be a more reasonable number. For pulse width measurement, the maximum signal frequency needs to be a fairly small fraction of the maximum. So maybe 120KHZ (+/- 8uS) would be a reasonable limit on accurate pulse width measurement.

It is limited to 8 channels, which is probably enough for 99% of all uses.

The cost is reasonable.

The user interface looks pretty, but I have not tried the demo.

The hardware is compact and very functional. I am not sure about the length of the leads. They might be a little short, but given the hardware compactness, it will be able to get pretty close to the circuit under test.

All in all, it looks pretty good.

I am currently working on updating the PC software for the Spartan3-based logic analyzer for which Oak Micros makes an input level shifter. The software has all the functionality of the Saleae unit, but the screens are not as pretty. The Spartan3 unit has up to 31 channels in the most current version. It downloads the data comparatively slowly to the PC, but it can record the logic signals up to 200MHz. It now uses run length encoding so it is very possible to have data spanning more than 256K clocks of duration. With intermittent signals, like on any serial bus, the recordings can span a very long duration. I.E. more than 2^32 clocks, which creates all sorts of headaches with a GUI interface designed with a span of only up to 2^32. I am currently working on a total re-write of the method that the data is displayed, and this means that nearly every module and subroutine needs to be re-written. When complete, it ought to offer significantly more than the Salae unit. That being said, the Salae unit is really nice and the hardware is really compact and looks easy to use!

-Tony

[mikep]

[stevech]

[twesthoff]

General wrote:

[mikep]