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pjc30943
Joined: 02 Dec 2005
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Posted: 11 May 2009, 19:49 PM Post subject: ADC acquisition speed |
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Has anyone reduced the ADC sampling time on a native mode 1280 or 1281? 220us is too slow for this app by about a factor four.
Just curious what side-effects or issues you've come across when manually changing the registers per the ATmega datasheet (from the default) to get a shorter integration time.
EDIT: I might consider an external ADC for higher speeds, but the board is already running a few SPI DACs at high rates, so that resource is tied up much of the time. |
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dkinzer
Site Admin
Joined: 03 Sep 2005
Location: Portland, OR
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Posted: 12 May 2009, 14:12 PM Post subject: Re: ADC acquisition speed |
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| pjc30943 wrote: | | Has anyone reduced the ADC sampling time on a native mode 1280 or 1281? |
You'll want to check the datasheet to confirm but I believe that the GetADC() functions uses the smallest possible prescaler (thus yielding the fastest ADC clock allowable) given the processor speed. You may be able to configure it for a faster conversion time if a lower resolution is acceptable. |
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