GTBecker
Joined: 18 Jan 2006
Posts: 457
Location: Cape Coral
|
|
Posted: 16 September 2009, 18:59 PM Post subject: ZX-24n SPI pins available for general I/O? |
|
|
| On a ZX-24n with no SPIcmd use, can three J1 SPI pins (CS, MOSI, and SCK) be used for I/O? If I sever the EEPROM MISO trace, can I use it, too? |
|
dkinzer Site Admin
Joined: 03 Sep 2005
Posts: 2499
Location: Portland, OR
|
|
Posted: 16 September 2009, 19:47 PM Post subject: Re: ZX-24n SPI pins available for general I/O? |
|
|
| GTBecker wrote: | | On a ZX-24n with no SPIcmd use, can three J1 SPI pins (CS, MOSI, and SCK) be used for I/O? | Yes.
| GTBecker wrote: | | If I sever the EEPROM MISO trace, can I use it, too? | Yes. The MISO trace shouldn't need to be cut as long as the EEPROM's chip select is kept inactive (high). Since there is a pullup on the CS line, it should only be necessary to cut the CS trace in a manner that keeps the pullup connected to the EEPROM.
Because the connections to the CS and MISO leads of the EEPROM are under the device, the simplest solution may be to just remove the EEPROM from the board. |
|