MMC Card Variability

[JC]

I am interested in storing data on an MMC card. I have 64MB, 128Mb, & 256MC cards to play with.

I have bit-banged the SPI interface to learn how to do it, to avoid any internal ZX interrupt issues which could interfere with the software serial comm ports, and to avoid any data block length / Chip Select issues.

I can Init and Block Read / Write to the 64MB & 256MB cards.

I can not get the 128MB card to Init into SPI mode. I send synch pulses, then Cmnd0, the expect the R1 response. I never get the R1 response from this card. The others generate it 8 clock pulses after the Cmnd0.

The card works fine in a multi-card USB reader on a PC. I can format, and R/W to the card(s).
It happens to be a different brand of card than the two that I have working with the ZX-24, (Label is KingMax R).

On the PC the card is obviously in MMC Mode, FAT partition, etc. The PC does not test the SPI capability of the card...

I wondered if others have had any similar experiences, where particular cards seem problematic?

Since the other 2 cards work I believe the core of my code is functional. Tweaking some timing and padding made no difference.
Card is running a 3.3 V, with Oscoped level shifters.
Any thoughts?
JC

[dkinzer]

[spamiam]

[zbasicandy]

[JC]

I saw that the SPICmd byte count had increased. That is truely a good thing. I may play with the internal commands instead of the bit-bang to see if it makes a difference, but I suspect it is a card issue. Further web searching found lots of post for the same make card not working with certain MP3 equipped cell phones... Sounds like the SPI does not work on that version MMC card.

I used the Spark Fun breakout board and MMC card holder for my testing. I used a resistive divider to bring 5V signals down to 3.3V. I used 2 transistors to bump up the 3 v to 5 volt signal. Bit-Bang is slow, but I would not expect either level translator to be bandwidth limited for the 0-20MHz signal range.

One of the reasons I wrote the bit-bang, besides wanting to learn how it works, was that I believe, (ie yet to be tested), that as long as Chip Select stays low the clock frequency can go to 0. What this means is that for data logging, I can write data packets as needed, and not use a 512 byte tmp array, or an extra eeprom for tmp data storage.

One application I have in mind requires 30 byte data packets, one packet every second. I can write 17 packets, then close out the 512 byte MMC sector with 2 junk bytes, and start the next sector. If needed one could use the two "spare" bytes per 512 sector, but with MMC card size it is not an issue for me.

I'll see how it goes.

[dkinzer]

"I believe [...] that as long as Chip Select stays low the clock frequency can go to 0."

If this idea pans out, I suspect that you can still implement it using the hardware SPI channel. I haven't worked out the details but I believe that you could use a 74HCT125 and a 74AHC157 to peform both the level shifting and the SPI suspend function while an additional ZX output keeps the chip select low. I can draw up a proposed circuit if you're interested.

[JC]

Sure, I'd love to see the circuit. But I have not yet confirmed the premise that the Clock can go to 0 Hz. I leave for a string of night shifts and won't be home to work on this further until middle of next week...

I have not previously uploaded schematics, or code, but will do so for anyone interested.

Don't laugh too much at the code. The goal is a working system, after that everything else is performance enhancement. The big step was the first one, just making it work. Also, note that my original goal, beside learning the MMC and SPI protocol, was to NOT use the internal routines, or anything which uses Timer1, or could interfere with the software USARTs.

I have left my personal MMC & SPI learning curve Notes included within the code.

JC

[JC]

ZX-24 to MMC Memory Card Schematic is attached as a JPG image.
ZX-24 5 V to MMC 3 V Signal Level Converter is a resistor divider.
3V to 5V converter uses two, 2N3904 transistors to bump the signal up to 5 V. Each stage inverts the signal.
Do NOT forget the pull up resistor on the MMC Data Output pin.
It is 10K, (Value not shown in the uploaded image.)
JC

[Edit: reduced image size. Full-size image.]

[JC]

ZX-24 to MMC Memory Card Bit-Banged Program.

Program works, but isn't pretty!
Includes my MMC & SPI learning curve notes for those wishing to develop this further.
JC

[dkinzer]

Here is my proposed schematic for allowing the MMC card to be continuously selected and to provide 3.3/5 volt level conversion at the same time. The 74HCT125 could be replaced with the single transistor level converter shown in app note AN-213 or any other suitable conversion circuit.

The SS/ output from the ZX is the pin that will be specified in the call to OpenSPI(). The SEL/ output from the ZX is an additional I/O pin that will be separately controlled by the program.

The multiplexor serves to control the presentation of the clock signal to the MMC card. When the SS/ line is low, the SCK signal will be routed to the MMC card. When the SS/ line is high, the clock signal to the MMC card will be continuously low. It is not really necessary to run the MOSI signal through the multiplexor but since it needs level conversion anyway, it is convenient to do so.

The sequence that I propose to use with this circuit is as follows:
1) set the SEL/ signal low.
2) perform one or more SPICmd() calls to send/receive data to/from the MMC.
3) set the SEL/ signal high.

I believe that this will work with no spurious transitions on the CLK signal because the ZX VM asserts and deasserts the SS/ output when the SCK signal is idle.

Note that this circuit assumes that the MMC uses SPI mode 0 but it could be modified to work with the other modes.