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1280 SPI CS

 
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pjc30943



Joined: 02 Dec 2005
Posts: 220

Posted: 15 April 2008, 20:43 PM    Post subject: 1280 SPI CS Reply with quote

There are no dedicated CS pins for SPI on the 1280 as there were on the 1281ae, right? It's not clear whether the 1280/1 requires them fixed in hardware, or if on the 1281ae the pin was just a designation for convenience.

EDIT: clarification: there is support for 4 HW ports, but only one defined CS is included. This actually is exactly the same, then, as the 1281. The (new) question is whether there's a difference between using user-defined CS pins, and the explicitly reserved CS.
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mikep



Joined: 24 Sep 2005
Posts: 765
Location: Austin, TX

Posted: 15 April 2008, 22:09 PM    Post subject: Reply with quote

I believe there is no difference. Here is the relevant text from the datasheet:
Quote:
When configured as a Master, the SPI interface has no automatic control of the SS line. This must be handled by user software before communication can start.

This means the VM must explicitly control the SS line (PB0) and could just as well do this for a user configured chip select pin.
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dkinzer
Site Admin


Joined: 03 Sep 2005
Posts: 2499
Location: Portland, OR

Posted: 15 April 2008, 23:05 PM    Post subject: Re: 1280 SPI CS Reply with quote

pjc30943 wrote:
the explicitly reserved CS.
The pin that with the SS designation is defined for use as an input when the device is an SPI slave. Any output pin can be used for SS when the device is an SPI master.

Currently, the ZBasic System Library functions do not support slave mode. One could write code for that mode for a native mode device.
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pjc30943



Joined: 02 Dec 2005
Posts: 220

Posted: 16 April 2008, 15:54 PM    Post subject: Reply with quote

Thanks guys; this is clear now.
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stevech



Joined: 23 Feb 2006
Posts: 657

Posted: 16 April 2008, 19:12 PM    Post subject: Reply with quote

was there an issue where the SPI (for any ZBasic product) cannot run at 4MHz (VM issue?)
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dkinzer
Site Admin


Joined: 03 Sep 2005
Posts: 2499
Location: Portland, OR

Posted: 16 April 2008, 21:12 PM    Post subject: Reply with quote

stevech wrote:
was there an issue where the SPI (for any ZBasic product) cannot run at 4MHz (VM issue?)
I don't recall any such problem nor do I see any evidence in the change history. Are you seeing a problem?
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mikep



Joined: 24 Sep 2005
Posts: 765
Location: Austin, TX

Posted: 16 April 2008, 23:14 PM    Post subject: Reply with quote

stevech wrote:
was there an issue where the SPI (for any ZBasic product) cannot run at 4MHz (VM issue?)
Are you perhaps confused with 8MHz? The SPI bus can only run at a maximum speed of 1/2 clock speed which is of course 7.3828 MHz.
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stevech



Joined: 23 Feb 2006
Posts: 657

Posted: 17 April 2008, 2:42 AM    Post subject: Reply with quote

No SPI issue here.
I'll search the forums to find what I too-vaguely remember about limitations of connecting SPI devices using the VM. Maybe nothing and I'm (again) hosed up.
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Don_Kirby



Joined: 15 Oct 2006
Posts: 329
Location: Long Island, New York

Posted: 18 April 2008, 22:20 PM    Post subject: Reply with quote

The only speed related SPI issue that I can recall is the 25256 vs 25256A issue, with the former not being fast enough.

-Don
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dlh



Joined: 15 Dec 2006
Posts: 266
Location: ~Cincinnati

Posted: 18 April 2008, 23:20 PM    Post subject: Reply with quote

There was an issue with early versions of the ENC28J60 which had to run SPI at 8MHz or use the same clock for it and the microcontroller. Maybe this is what you were remembering.
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stevech



Joined: 23 Feb 2006
Posts: 657

Posted: 19 April 2008, 2:26 AM    Post subject: Reply with quote

Need more vitamin E
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