dkinzer
Site Admin
Joined: 03 Sep 2005
Posts: 2593
Location: Portland, OR
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Posted: 26 June 2008, 23:10 PM Post subject: |
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| sturgessb wrote: | | how is Register.ICR1 calculated? [I'm] confused. |
That's why I've urged you several times to read AN-216. It gives a detailed description of the process including why/how a prescaler must be selected.
Also, I gave the formula for the Phase/Frequency Correct mode in a previous post, reproduced below.
| Code: | | icr = F_cpu / (2 * prescaler * F_pwm) |
The key is to understand the role of the 'prescaler' element. This is necessary at lower frequencies to keep the ICR value less than 65536 which it must be to fit in a 16-bit register. With a prescaler of 1, the ICR value for 50Hz would need to be 368,640 - too large for a 16-bit register.
A prescaler value of at 6 or more must be used in order to reduce the ICR value to less than 65536. However, 6 is not one of the available choices which are (from the datasheet) 1, 8, 64, 256 and 1024. Choosing the smallest prescaler value that will work yields the maximum resolution (as explained in the application note), so a prescaler of 8 would be the best choice for 50Hz. Plugging that value in the equation above gives a result of 18,432 for ICR. That the ICR value is the same is not suprising because 50Hz is 1/8 of 400Hz and the timer is being clocked at 1/8 the rate in that case due to the use of 8 for the prescaler.
In any event, the duty cycle of the resulting waveform depends only on the ratio of OCR to ICR - the prescaler value is immaterial. |
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sturgessb
Joined: 25 Apr 2008
Posts: 246
Location: Norwich, UK
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Posted: 26 June 2008, 23:26 PM Post subject: |
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I did read it, just maybe not understood it! 
Thanks for all your help Don. Got it working great using that, and its given the 100hz increase i was looking for!
Thanks
Ben |
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